Key Takeaways
- Huawei announced a novel semiconductor‑manufacturing approach that could bypass its lack of access to advanced US‑made lithography tools.
- The company claims it will be able to produce 1.4‑nanometre (nm) chips by 2031, three years after TSMC’s projected 2028 milestone for the same node.
- Rather than relying on ever‑smaller transistor sizes (Moore’s Law), Huawei’s method optimises the communication time between chip elements, dubbed the Tau Scaling Law (also referred to as “Her’s Law”).
- The first product to use this architecture will be Huawei’s upcoming Kirin chip, employing a design called LogicFolding, slated for release in autumn 2026.
- Analysts view the move as a strategic attempt to lead the global chip race, likely intensifying US‑China technology tensions.
Background of Huawei’s Sanctions
Since 2019, the United States has placed Huawei on a series of export controls that bar the firm from acquiring American‑made semiconductors, manufacturing equipment, and related technologies. The restrictions were justified by Washington on national‑security grounds, alleging that Huawei’s gear could be used for espionage by the Chinese government—a claim the company consistently denies. As a result, Huawei lost access to critical tools such as extreme‑ultraviolet (EUV) lithography machines, which are essential for producing chips at 5 nm and smaller nodes. The sanctions have forced the Chinese tech giant to seek alternative routes to sustain its smartphone, networking, and cloud businesses.
The Challenge of Advanced Lithography
EUV lithography uses short‑wavelength light to etch incredibly fine patterns onto silicon wafers, enabling the densest transistor arrays currently possible. Without EUV, chipmakers must rely on older deep‑ultraviolet (DUV) tools combined with multiple patterning techniques, which increase cost, reduce yield, and limit how far transistor dimensions can shrink. For Huawei, the inability to procure EUV machines meant that the traditional path of following Moore’s Law—doubling transistor density roughly every two years—had become economically and technically untenable.
Huawei’s Announced Timeline for 1.4 nm Chips
At the International Symposium on Circuits and Systems (ISCAS) in Shanghai on May 25, 2026, He Tingbo, head of Huawei’s semiconductor division, disclosed that the company aims to fabricate next‑generation 1.4 nm chips by 2031. This target is notably ambitious: Taiwan’s TSMC, the industry’s leading foundry, has publicly projected that it will achieve the same node by 2028. Huawei’s timeline therefore implies a three‑year lag behind the current front‑runner, but it also signals that the company believes it can close the gap through a fundamentally different manufacturing philosophy rather than merely catching up on equipment access.
From Moore’s Law to the Tau Scaling Law
Moore’s Law, formulated by Intel co‑founder Gordon Moore, observes that the number of transistors on a chip doubles approximately every two years, driven by continual miniaturisation. As transistors approach atomic scales, physical limits such as quantum tunnelling and heat dissipation make further size reductions increasingly difficult. He Tingbo introduced an alternative principle she calls the Tau Scaling Law (also nicknamed “Her’s Law”). Instead of focusing exclusively on shrinking transistor spacing, the Tau Scaling Law optimises the time it takes for signals to travel between functional blocks on a chip. By reducing communication latency, designers can achieve performance gains comparable to those from denser transistor packing without needing to push lithography to ever‑smaller nodes.
How Tau Scaling Addresses Physical Limits
The core insight behind Tau Scaling is that modern chip performance is often bounded not by raw transistor count but by the delay incurred when data moves across the die—especially in heterogeneous architectures that integrate CPUs, GPUs, AI accelerators, and memory. By re‑architecting interconnects, employing advanced packaging (such as 2.5‑D and 3‑D stacking), and using novel materials that enhance signal propagation speed, a chip can deliver higher effective compute throughput even if its transistor density grows more slowly. This approach sidesteps the steep cost and complexity associated with EUV‑based scaling while still delivering competitive performance for AI workloads, high‑performance computing, and 5G/6G communications.
Introducing LogicFolding: The First Practical Application
Huawei stated that the inaugural product to embody the Tau Scaling Law will be the next iteration of its Kirin system‑on‑chip (SoC), expected to launch in autumn 2026. The chip will employ a design methodology dubbed LogicFolding, which rearranges logical blocks to minimise the physical distance signals must travel. LogicFolding leverages hierarchical placement algorithms and adaptive routing to “fold” disparate functional units closer together in the layout plane, thereby reducing latency and power consumption. The company asserts that the resulting Kirin chip will match or exceed the performance of competing 5 nm‑class products despite being fabricated on a less aggressive node.
Industry Reaction and Strategic Implications
George Chen, Partner and Chair of Digital Practice at The Asia Group, characterised Huawei’s announcement as a clear signal of intent to lead rather than follow in the global semiconductor race. He noted that even without an immediate product launch, the firm’s public commitment to a new scaling paradigm raises concerns in Washington about China’s capacity to circumvent technological containment measures. Analysts warn that if Huawei’s Tau Scaling approach proves viable at scale, it could erode the US’s reliance on export controls as a lever to slow Chinese advancement, prompting a reassessment of policy tools aimed at safeguarding technological leadership.
Potential Risks and Uncertainties
While the Tau Scaling Law offers an intriguing theoretical pathway, translating it into reliable, high‑volume manufacturing presents substantial challenges. The approach demands breakthroughs in design automation, advanced packaging, and material science—areas where Huawei has historically lagged behind industry leaders such as TSMC, Samsung, and Intel. Moreover, the promised 1.4 nm node by 2031 assumes continued progress in complementary technologies (e.g., gate‑all‑around transistors, novel interconnect materials) that may themselves depend on equipment currently restricted by sanctions. Any delay in these ancillary developments could push Huawei’s timeline further out, reducing the competitive advantage of its new scaling law.
Broader Context of the US‑China Tech Rivalry
The semiconductor arena remains a focal point of the broader strategic competition between the United States and China. Chips are the linchpin of artificial intelligence, advanced telecommunications, defense systems, and consumer electronics; thus, control over cutting‑edge fabrication capability translates directly into geopolitical influence. Huawei’s effort to redefine scaling laws reflects a broader Chinese strategy to achieve self‑sufficiency in critical technologies by leveraging indigenous innovation, talent pools, and state‑backed investment. Whether this approach will succeed in the long term hinges on the company’s ability to execute complex R&D programs, secure reliable supply chains for non‑US equipment, and convince global customers that its chips meet the stringent performance and reliability standards demanded by data‑center operators and smartphone makers.
Conclusion
Huawei’s recent declaration of a novel semiconductor manufacturing pathway—centered on the Tau Scaling Law and its first implementation via LogicFolding in an upcoming Kirin chip—represents a bold attempt to sidestep the limitations imposed by US sanctions on EUV lithography. By shifting the optimisation target from transistor density to signal‑propagation time, the company hopes to achieve performance parity with the industry’s most advanced nodes while operating on a less aggressive manufacturing trajectory. If successful, this could reshape the competitive dynamics of the global chip market and intensify the technological contest between Washington and Beijing. However, considerable technical, economic, and geopolitical hurdles remain, and the ultimate viability of Huawei’s approach will only be proven through tangible products, yield data, and market adoption in the years ahead.